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Developing FPGA-accelerated cloud applications with SDAccel: Theory

Developing FPGA-accelerated cloud applications with SDAccel: Theory

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9.2/10 (Our Score)
Product is rated as #2 in category Cloud Computing

This course is for anyone passionate in learning how to develop FPGA–accelerated applications with SDAccel! We are entering in an era in which technology progress induces paradigm shifts in computing! As a tradeoff between the two extreme characteristics of GPP and ASIC, we can find a new concept, a new idea of computing… the reconfigurable computing, which has combined the advantages of both the previous worlds. Within this context, we can say that reconfigurable computing will widely, pervasively, and gradually impact human lives. Hence, it is time that we focus on how reconfigurable computing and reconfigurable system design techniques are to be utilised for building applications. One one hand reconfigurable computing can have better performance with respect to a software implementation but paying this in terms of time to implement. On the other hand a reconfigurable device can be used to design a system without requiring the same design time and complexity compared to a full custom solution but being beaten in terms of performance. Within this context, the Xilinx SDx tools, including the SDAccel environment, the SDSoC environment, and Vivado HLS, provide an out–of–the–box experience for system programmers looking to partition elements of a software application to run in an FPGA–based …

Instructor Details

Marco Domenico Santambrogio is an Assistant professor at Politecnico di Milano and a Research Affiliate with the CSAIL at MIT. He received his laurea (M.Sc. equivalent) degree in Computer Engineering from the Politecnico di Milano (2004), his second M. Sc. degree in Computer Science from the University of Illinois at Chicago (UIC) in 2005 and his PhD degree in Computer Engineering from the Politecnico di Milano (2008). Dr. Santambrogio was a postdoc fellow at CSAIL, MIT, and he has also held visiting positions at the Department of Electrical Engineering and Computer Science of the Northwestern University (2006 and 2007) and Heinz Nixdorf Institut (2006). Marco D. Santambrogio is a senior member of the IEEE. Marco D. Santambrogio is a senior member of both the IEEE and ACM, he is member of the IEEE Computer Society (CS) and the IEEE Circuits and Systems Society (CAS). He is or has been member of different program committees of electronic design automation conferences, among which: DAC, DATE, CODES+ISSS, FPL, RAW, EUC, IFIP VLSI Conference. He has been with the Micro Architectures Laboratory at the Politecnico di Milano, where he founded the Dynamic Reconfigurability in Embedded System Design (DRESD) project in 2004. In 2011, he founded the Novel, Emerging Computing System Technologies Laboratory (NECSTLab – http://necst.it/), merging together the two previously existing labs: MicroLab and VPLab, and he is, since then, in charge of the laboratory.

Specification: Developing FPGA-accelerated cloud applications with SDAccel: Theory

Duration

9 hours

Year

2019

Level

Intermediate

Certificate

Yes

Quizzes

Yes

7 reviews for Developing FPGA-accelerated cloud applications with SDAccel: Theory

4.6 out of 5
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  1. Akhil K

    Good.

    Helpful(0) Unhelpful(0)You have already voted this
  2. Sharath

    Industry standards are met, a good course to start from basic

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  3. Satheesh N P

    Great course

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  4. Avinash S P

    Nice one …

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  5. Ming M

    A very nice introduction course to give you a detailed look at how FPGA can be used to accelerate software applications.

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  6. Duchstf

    Good intro!

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  7. yusef i

    It was less about how to code more about theory and in this course they mainly talked about high level synthesis.

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    Developing FPGA-accelerated cloud applications with SDAccel: Theory
    Developing FPGA-accelerated cloud applications with SDAccel: Theory

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